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Semiconductors.

From wafer fabrication economics to compound semiconductor material science — our highest-conviction sector. We analyze the full semiconductor value chain with the technical depth that financial analysts rarely possess.

Our Thesis

Semiconductors are the foundational substrate of every major technology trend — artificial intelligence, autonomous vehicles, 5G/6G communications, electrification, and defense modernization all converge on silicon, and increasingly on compound semiconductor materials like indium phosphide, gallium arsenide, and silicon carbide. This is our highest-conviction sector because the technical complexity creates persistent analytical advantages for researchers who understand the physics, the manufacturing processes, and the supply chain interdependencies that drive value.

The semiconductor industry operates on structural dynamics that most financial models fail to capture. Node progression economics are non-linear: the capital required to build a leading-edge fab has increased from $5 billion at 28nm to over $20 billion at 3nm, concentrating cutting-edge manufacturing in two companies globally. Yield curves follow learning rates that determine profitability trajectories months before they appear in financial statements. Equipment lead times of 18-24 months for advanced lithography tools create supply constraints that can be predicted by tracking order backlogs at ASML, Applied Materials, and Lam Research. These are observable, analyzable dynamics — but only if you know where to look.

We have particular expertise in compound semiconductors — the materials that enable optical communications, RF/microwave systems, power electronics, and photonic sensing. While silicon dominates digital logic, compound materials like InP (indium phosphide) for optical transceivers, GaAs (gallium arsenide) for RF amplification, and SiC (silicon carbide) for power conversion are experiencing demand inflections driven by AI data center interconnects, 5G infrastructure, and electric vehicle powertrains. These are smaller companies with genuine technical moats trading at fractions of the valuations assigned to their silicon counterparts.

Research Framework

Fab Economics & Manufacturing

  • •Node progression cost curves — capex per wafer start from 28nm through 2nm GAA
  • •Yield ramp modeling: defect density trajectories and learning rate coefficients
  • •EUV lithography economics — multi-patterning vs. high-NA EUV cost crossover analysis
  • •Advanced packaging: 2.5D/3D integration, CoWoS capacity constraints, chiplet economics
  • •Foundry utilization rates and wafer pricing dynamics across process nodes

Supply Chain Mapping

  • •Full value chain: EDA → design → foundry → OSAT → advanced packaging → test
  • •Equipment supply chain: lithography (ASML), etch (LAM), deposition (AMAT), inspection (KLA)
  • •Materials supply: specialty gases, photoresists, CMP slurries, substrates, targets
  • •Geographic concentration risk — Taiwan foundry dependency, China materials exposure
  • •CHIPS Act and FABS Act capital allocation tracking and subsidy economics

End-Market Demand Models

  • •AI accelerator TAM: GPU, custom ASIC (TPU, Trainium, Inferentia), and inference chip demand
  • •Automotive semiconductor content — ADAS, EV power management, infotainment per-vehicle ASP
  • •5G/6G infrastructure: RAN equipment, mmWave front-end modules, massive MIMO economics
  • •IoT and edge compute: low-power MCU demand, RISC-V adoption curves, sensor fusion
  • •Data center networking: 800G/1.6T optical transceiver demand, switch ASIC roadmaps

Compound Semiconductors

  • •InP (indium phosphide): optical transceiver market, coherent DSP integration, data center buildout
  • •GaAs (gallium arsenide): RF front-end modules, 5G infrastructure, defense phased arrays
  • •SiC (silicon carbide): EV inverter adoption, industrial power conversion, substrate supply
  • •GaN (gallium nitride): power electronics, RF amplification, defense radar systems
  • •Substrate quality metrics: dislocation density, wafer diameter scaling, epitaxial uniformity
Research Example

How We Analyze a Semiconductor Company

Step 1: Technology Position Assessment

We start by mapping the company's position in the semiconductor value chain and evaluating the defensibility of its technology. For a fabless company like Marvell, this means assessing IP portfolio depth across custom silicon (ASIC), networking (PAM4 SerDes, switch ASICs), and optical DSP — and critically, whether design wins translate to multi-year revenue streams with high switching costs. For an IDM like Intel, we evaluate manufacturing competitiveness: where are they on the process node roadmap, what is their yield trajectory on Intel 18A, and can the foundry services business win external customers at scale? Technology position determines the ceiling; execution determines how much of that ceiling is captured.

Step 2: Design Win Pipeline Analysis

In semiconductors, revenue today was determined by design wins 2-3 years ago. We track the design win pipeline by end customer, product generation, and expected volume ramp timeline. A company like Coherent winning a 1.6T optical transceiver socket at a Tier-1 hyperscaler represents predictable revenue 18-24 months forward. We model the conversion rate of design wins to production revenue, accounting for customer qualification cycles, yield ramp timelines, and the risk that programs get delayed, downsized, or canceled. This forward pipeline analysis frequently reveals growth inflections that quarterly earnings reports won't show for another six quarters.

Step 3: Margin Structure & Operating Leverage

Semiconductor companies have extreme operating leverage — fixed costs in R&D and depreciation are enormous, so gross margin and operating margin expand dramatically as revenue scales. We model this leverage explicitly: for a fabless company, R&D as a percentage of revenue declines as products ramp (design costs are front-loaded), while gross margins improve as yields mature. For an IDM, fab utilization rates are the critical variable — the difference between 70% and 90% utilization on a $20 billion fab can be $2-3 billion in annual operating income. We track leading indicators of utilization: wafer starts, equipment orders, and customer inventory levels that predict demand turns.

Step 4: Cycle Position & Inventory Analysis

Semiconductors are cyclical, and inventory dynamics drive the cycle. We monitor channel inventory (distributor weeks-on-hand), customer inventory (days-of-inventory at OEMs), and supply-side inventory (wafer bank levels, die bank levels). When distributor inventory drops below 8 weeks in analog/mixed-signal, it signals restocking demand. When customer inventory exceeds 60 days in memory, it signals an impending demand correction. These inventory dynamics create predictable patterns of over-ordering and destocking that produce buying opportunities for patient investors who understand the cadence. The 2022-2023 semiconductor downturn was visible in inventory data six months before it appeared in earnings guidance.

Step 5: Valuation Through the Cycle

Semiconductor valuations must account for cyclicality. A company trading at 30x peak earnings looks expensive but may be cheap on trough-normalized earnings. Conversely, a company at 15x trough earnings may look cheap but is pricing in a recovery that may not materialize. We use mid-cycle earnings as our primary valuation anchor, calculated from structural revenue growth rates, normalized utilization assumptions, and through-cycle margin profiles. We overlay this with EV/sales for design-cycle companies and SOTP (sum-of-the-parts) for diversified players. The goal is to buy leading technology at cyclical troughs — which requires the conviction to invest when quarterly results look worst but the forward setup is most favorable.

Coverage Universe

AI & COMPUTE
  • NVIDIA (NVDA)
  • AMD (AMD)
  • Broadcom (AVGO)
  • Marvell Technology (MRVL)
  • Intel (INTC)
  • Qualcomm (QCOM)
COMPOUND SEMI & OPTICAL
  • AXT Inc (AXTI)
  • Applied Optoelectronics (AAOI)
  • Coherent (COHR)
  • II-VI / Coherent (COHR)
  • Lumentum (LITE)
  • IPG Photonics (IPGP)
ANALOG & MIXED-SIGNAL
  • Texas Instruments (TXN)
  • Analog Devices (ADI)
  • Microchip Technology (MCHP)
  • Silicon Labs (SLAB)
  • SiTime (SITM)
  • MaxLinear (MXL)
TEST & MEASUREMENT
  • Keysight Technologies (KEYS)
  • Teradyne (TER)
  • Cohu (COHU)
  • FormFactor (FORM)
  • Onto Innovation (ONTO)
EQUIPMENT & MATERIALS
  • ASML (ASML)
  • Applied Materials (AMAT)
  • Lam Research (LRCX)
  • KLA Corporation (KLAC)
  • Entegris (ENTG)
ETFs & INDICES
  • SMH (VanEck Semi)
  • SOXX (iShares Semi)
  • PSI (Invesco Dynamic)
  • SOXL (3x Bull Semi)
  • USD (ProShares Ultra)

Current Themes

AI Accelerator Demand Supercycle

GPU and custom ASIC demand for AI training and inference is growing at 50-100%+ annually, driven by hyperscaler capex commitments exceeding $200 billion in 2025. This demand pulls through the entire supply chain — HBM memory from SK Hynix and Samsung, CoWoS packaging capacity from TSMC, optical transceivers for GPU cluster networking, and power management ICs for server racks consuming 70-100kW. We track allocation constraints at each chokepoint to identify which companies have pricing power and which are commoditized suppliers along for the ride.

Optical Interconnect Buildout

AI clusters require massive bandwidth between GPUs, and optical interconnects are replacing copper at shorter and shorter distances. 800G transceivers are ramping, 1.6T is in qualification, and co-packaged optics represent the next architectural shift. Companies with InP laser technology, coherent DSP capability, and vertical integration from chip to module — like Coherent and Applied Optoelectronics — are positioned at the intersection of semiconductor technology and AI infrastructure demand. This is where our compound semiconductor expertise creates genuine analytical edge.

Compound Semi Inflection Point

Silicon carbide in EVs, gallium nitride in power and RF, indium phosphide in optical communications — compound semiconductor materials are experiencing simultaneous demand inflections across multiple end markets. The substrate companies (AXT, Wolfspeed, Coherent) represent bottleneck positions in these supply chains, as growing high-quality compound semiconductor crystals is technically difficult, capital intensive, and has long qualification cycles. When demand inflects, substrate companies see it first and benefit from both volume and pricing power.

CHIPS Act Beneficiaries

The CHIPS and Science Act is deploying $52 billion in subsidies and tax credits to reshore semiconductor manufacturing to the United States. Intel, TSMC, Samsung, GlobalFoundries, and Micron are building fabs with 25-35% cost offsets from federal incentives. But the second-order beneficiaries — equipment companies, specialty materials suppliers, and construction/infrastructure firms — often capture higher-margin revenue streams. We map the full subsidy flow from federal allocation through to the companies that ultimately receive the dollars as revenue.

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